Layout Designs of Integrated Circuits

 

Layout Designs of Integrated Circuits

Articles 35 to 38 of Section 6/Part II of the TRIPS agreement contains the provisions for protection of rights in respect of Layout Designs of Integrated Circuits.

The basis for protecting integrated circuit designs (Topographies) in the TRIPS Agreement is the Washington Treaty on Intellectual Property in Respect of Integrated Circuits, 1989. India is a signatory to this international agreement.

In India, the IPRs on the layout designs of integrated circuits are governed by theSemiconductor Integrated Circuits Layout-Design Act, 2000.

Under this Act, a layout-design shall be considered original if it is the result of its creator's own intellectual efforts and is not commonly known to the creators of layout-designs and manufacturers of semiconductor integrated circuits at the time of its creation. But a layout-design, which is not original, or which has been commercially exploited anywhere in India or in a convention country; or which is not inherently distinctive; or which is not inherently capable of being distinguishable from any other registered layout-design, shall not be registered as a layout-design. But if a layout-design which has been commercially exploited for not more than two years from the date on which an application for its registration has been filed either in India or in a convention country shall be treated as not having been commercially exploited.

The registration of a layout-design shall be only for a period of ten years counted from the date of filing an application for registration or from the date of first commercial exploitation anywhere in India or in any country whichever is earlier. No person shall be entitled to institute any proceeding to prevent, or to recover damages for, the infringement of an unregistered layout-design.